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data bulletin MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 1200/2400bps msk modem for trunked radio systems features band iii & general purpose trunked radio apps full-duplex 1200 and 2400 baud operation error check word generation and checking preamble generation processor compatible interface frame sync and synt detection low power consumption general purpose timer carrier detect time constant msk receiver rx carrier detect sync/synt detector byte counter checksum checker rx data register rx data buffer 8-bit up bus 8-bit up bus clocks clock generators timer control register tx data buffer tx data register byte counter checksum generator msk transmitter interrupt generator data data 1200/ baud 2400 v dd v ss xtal/clock xtal 1.008 mhz output strobe w r/ a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 microprocessor interface recovered clock rx message format rx checksum true v bias status register sync synt rx data ready rx carrier det. rx checksum true tx data ready tx idle timer expired tx parity enable transmitter output irq rx data rdy tx data rdy sync synt tx idle rx enable tx enable rx message format tx parity enable receiver input the MX429A is a single-chip cmos 1200 and 2400 baud msk modem, designed primarily for use in trunked radio systems but may also be employed in other general purpose radio or line data communication applications. the device has been designed to conform to the uk band iii trunked radio protocols mpt 1317/1327. the MX429A is full duplex at 1200 and 2400 baud and includes an 8-bit parallel microprocessor interface and a programmable timer which may be set for interrupt periods of 8 to 120 bits. preamble may be generated by the device in transmit. the 16-bit sync or synt words are detected in receive. an error check word is automatically generated in transmit and error checking is performed in the receive mode. an on-chip xtal/clock generator requiring an external 4.032mhz xtal or clock input provides both 4.032mhz and 1.008mhz outputs and performs all modem timings. the MX429A requires a single 5-volt power supply, has a powersave facility, and is available in the following package styles: 24-pin cdip (MX429Aj), 24-pin pdip (MX429Ap), and 24-pin plcc (MX429Alh).
1200/2400bps msk modem for trunked radio systems 2 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. contents section page 1 block diagram................................................................................................................. 3 2 signal list................................................................................................................... ..... 3 3 external components..................................................................................................... 5 4 general description........................................................................................................ 6 4.1 modems in mobile data signaling .......................................................................................... 6 4.1.1 digital code format....................................................................................................... ............. 6 4.1.2 operation................................................................................................................. ................... 6 4.1.3 non mpt application C full-duplex....................................................................................... ... 7 4.1.4 control register (a1 = 1, a0 = 1, w r/ = 0, write only)........................................................... 7 4.1.5 status register (a1 = 1, a0 = 1, w r/ = 1, read only) ............................................................ 8 4.1.6 rx data buffer (a1 = 1, a0 = 0, w r/ = 1, read only) ............................................................. 9 4.1.7 tx data buffer (a1 = 1, a0 = 0, w r/ = 0, write only).............................................................. 9 4.2 syndrome word............................................................................................................... ..... 10 4.2.1 syndrome low byte (a1 = 0, a0 = 0, w r/ = 1, read only) .................................................. 10 4.2.2 syndrome high byte (a1 = 0, a0 = 1, w r/ = 1, read only).................................................. 10 4.3 carrier detect time constant............................................................................................... 1 0 5 application ................................................................................................................... .11 5.1 checksum generation and checking................................................................................... 11 5.2 receive operation........................................................................................................... ..... 11 5.3 transmit operation.......................................................................................................... ..... 12 5.4 basic power up software..................................................................................................... 13 5.5 basic software interrupt flow............................................................................................... 14 5.6 bus interface timing........................................................................................................ ..... 15 5.6.1 bus interface design migration from mx429 to MX429A .......................................................... 15 6 performance specification........................................................................................... 15 6.1 electrical performance ...................................................................................................... ... 15 6.1.1 absolute maximum ratings .................................................................................................. .... 15 6.1.2 operating limits .......................................................................................................... ............. 15 6.1.3 operating characteristics ................................................................................................. ........ 16 6.1.4 timing.................................................................................................................... ................... 18 6.2 packaging................................................................................................................... .......... 18 mx?com, inc. reserves the right to change specifications at any time and without notice.
1200/2400bps msk modem for trunked radio systems 3 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 1 block diagram carrier detect time constant msk receiver rx carrier detect sync/synt detector byte counter checksum checker rx data register rx data buffer 8-bit up bus 8-bit up bus clocks clock generators timer control register tx data buffer tx data register byte counter checksum generator msk transmitter interrupt generator data data 1200/ baud 2400 v dd v ss xtal/clock xtal 1.008 mhz output strobe w r/ a1 a0 d7 d6 d5 d4 d3 d2 d1 d0 microprocessor interface recovered clock rx message format rx checksum true v bias status register sync synt rx data ready rx carrier det. rx checksum true tx data ready tx idle timer expired tx parity enable transmitter output irq rx data rdy tx data rdy sync synt tx idle rx enable tx enable rx message format tx parity enable receiver input figure 1: block diagram 2 signal list pin no. signal description j/p lh name type 11 v bias the internal circuitry bias line, held at v dd /2 this pin must be decoupled to v ss by a capacitor, see figure 2. 2 2 transmit output output the 1200 baud, 1200hz/1800hz and 2400 baud, 1200hz/2400hz msk tx output. when not enabled by the control register (d0) its output impedance is set high. 3 4 receiver input input the 1200/2400 baud received msk signal input. the 1200hz/1800hz, 1200hz/2400hz audio to this pin must be ac coupled via a capacitor, see figure 2. 55 v dd power positive supply. a single +5v regulated supply is required. it is recommended that this power rail be decoupled to v ss by a capacitor, see figure 2. 6 6 carrier detect time constant: the on-chip carrier detect function requires external component(s) on this pin. see figure 2for recommended component(s). 7 7 xtal/clock the input to the clock oscillator inverter. a 4.032 mhz xtal or externally derived clock pulse input should be connected here, see figure 2. 88 xtal the output of the 4.032 mhz clock oscillator.
1200/2400bps msk modem for trunked radio systems 4 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. pin no. signal description j/p lh name type 99 d0 10 10 d1 11 11 d2 microprocessor data interface 12 12 d3 these 8 lines are used by the device to communicate with a micro- 13 13 d4 processor with the r/ w , a0 and a1 inputs determining register selection. 14 14 d5 15 15 d6 16 16 d7 17 17 a0 register selection: these inputs, with the r/ w input, select the 18 18 a1 required register to the data bus as shown in table 2 19 19 strobe performs the dual functions of selecting the device for read or write and strobing data in or out. it should be generated by gating the high order address bits with a read/write clock. the MX429A is selected when this pin is a logic 0. 20 20 r/ w used in conjunction with a1 and a0 to determine which internal registers are connected to the data interface pins (d0 to d7) during strobe. 21 21 irq interrupt request. this line will go to a logic '0' when an interrupt occurs. this output can be "wire or'd" with other active low components (100kw pullup to v dd ). the conditions that cause the interrupts are indicated at the status register and are as follows: timer expired, rx data ready, tx data ready, tx idle, rx sync detect, rx synt detect 22 24 baud 2400 / 1200 select a logic 1 on this pin selects the 1200 baud option. tone frequencies are: one cycle of 1200hz represents a logic 1, one and a half cycles of 1800hz represents a logic 0. a logic 0 on this pin selects the 2400 baud option. tone frequencies are: one half cycle of 1200hz represents a logic 1, one cycle of 2400hz represents a logic 0. this pin has an internal 1m pullup resistor. 23 22 v ss power negative supply (gnd) 24 23 clock/4 a 1.008 mhz (x1 4) clock is available at this output for external circuit use, note the source impedance and source current limits. 4 3 leave this pin open-circuit table 1: signal list register r/ w a0 a1 control 0 1 1 status 1 1 1 rx data 1 0 1 tx data 0 0 1 syndrome low 1 0 0 syndrome high 1 1 0 table 2: register selection
1200/2400bps msk modem for trunked radio systems 5 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 3 external components microprocessor data interface d0 d1 d2 d3 d4 d4 d5 d5 d6 d6 d7 d7 a0 a1 v dd v dd c4 c6 c5 c3 transmit output receive input 'cd' time constant xtal/clock clock/4 1200/ baud select 2400 r2 v bias v ss c1 c2 x1 r1 xtal/clock MX429A xtal 7 8 recommended xtal component 24 23 22 21 20 19 18 17 16 15 14 13 d0 d1 d2 d3 xtal 1 2 3 4 5 6 7 8 9 10 11 12 strobe r/w irq figure 2: recommended external components r1 1m 10% c4 1.0 f 20% r2 1m 10% c5 1.0 f 20% c1 33pf 20% c6 1.0 f 20% c2 33pf 20% c3 0.1 f 20% x1 note 1 4.032mhz table 3: recommended external components notes: 1. for best results, a crystal oscillator design should drive the clock inverter input with signal levels of at least 40% of vdd, peak to peak. tuning fork crystals generally cannot meet this requirement. to obtain crystal oscillator design assistance, consult your crystal manufacturer.
1200/2400bps msk modem for trunked radio systems 6 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 4 general description 4.1 modems in mobile data signaling 4.1.1 digital code format the mpt 1327 signaling standard for trunked lmr systems protocol is used by the mx429 for communication between a trunking system controller (tsc) and users' radio units. these data stream formats are summarized in figure 3. preamble sync or synt for bit sync. sync word address code 101010...10..- bit reversals 1100010011010111 word optional data minimum 16 bits, ending in synt word code words logic'0' 0011101100101000 64 bits address code word structure (bit number 1 is transmitted first) bit no. no. of bits bit name 1 1 logic '1' 2 to 8 7 user identity 9 to 48 40 address & data 49 to 64 16 check bits (checksum) figure 3: tx and rx data stream 4.1.2 operation the MX429A can be used for full-duplex operation with the host microprocessor only having to operate on the data while the modem (MX429A) handles all other signaling routines and requirements. in the tx mode the MX429A will : 1. internally generate and transmit a preamble C bit reversals, for system bit synchronization. 2. accept from the host, and transmit, a 16-bit 'sync' or 'synt' word. 3. accept from the host, and transmit, 6 bytes of data (address code word): a. upon a software command, internally calculate and transmit a 2-byte checksum based on the previous 6 data bytes. b. upon a software command, disable internal checksum generation and allow continuous data transmission. 4. transmit 1 'hang bit' and go idle when all loaded data traffic has been sent (followed by a "tx idle" interrupt). in the rx mode the MX429A will: 1. detect and achieve bit synchronization within 16 bits. 2. search for and detect the 16-bit 'sync'/'synt' word. 3. output all received data after 'sync/synt,' in byte form. 4. upon a software command (rx message format), use the received checksum to calculate the presence (if any) of errors, and advise the host with an interrupt and a 16-bit syndrome word. note: in rx, a software command is used to determine whether a 'sync'/'synt' word is required after every 8 (6 data + 2 checksum ) received bytes, or "data" is received continually. normally the 'sync' word is used on the control data channel and the 'synt' word is used on the traffic data channel.
1200/2400bps msk modem for trunked radio systems 7 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 4.1.3 non mpt application C full-duplex the functions described in this section, to allow the MX429A modem to operate as a general purpose device, are obtained using the commands and indications detailed in the register instructions pages. tx: when enabled the device transmits a 101010......10 preamble until data for transmission is loaded by the host microprocessor. transmits 6 bytes of the loaded data followed by a 2-byte checksum based on that data. as long as tx data is loaded the transmitter will transmit, the 2-byte checksum being produced after every 6 bytes (8 byte packages). automatic checksum generation can be inhibited by a software command to allow transmission of continuous data streams. rx: when enabled requires the 16-bit sync or synt word (see notes) before outputting data bytes. the modem receiver will then output continuous bytes of data, after every 6 bytes received a 2-byte checksum word will be output and can be ignored or used for error checking. 4.1.4 control register (a1 = 1, a0 = 1, w r/ = 0, write only) the control register, when selected, directs the modems operation as described in table 4 bit description function bit 0 d0 tx enable set : d0 enables the transmitter for operation. a '0 C 1' transition causes bit synchronization and the start of 1010.........10 preamble pattern transmission. at least one byte of preamble will be transmitted. if data is loaded into the tx data buffer before one byte has been sent then that data will follow, otherwise whole bytes of preamble will continue until data is loaded. clear : the transmitter output pin is set to a high impedance and no transmitter interrupts are produced. bit 1 d1 tx parity enable set : d1 indicates to the transmitter that 2Cbyte checksums are to be generated by the modem. a '0 C 1' transition starts checksum generation on the next six bytes loaded from the tx data buffer into the tx data register. checksum generation continues for every 6 bytes loaded until this bit is cleared. the transmitter will send the generated checksum (2 bytes) after the last of each 6 bytes have been sent. if an underrun (no more data loaded) condition occurs before 6 bytes have been loaded checksum generation will abort, the transmission will cease after one 'hang' bit has been sent and bit 4 in the status register (tx idle) will be set. no checksum will be transmitted. clear : no checksum generation is carried out and the host may supply the checksum bytes. the output is then as written. bit 2 d2 rx enable set : d2 enables the receiver for operation. no data is produced (i.e. no rx data ready interrupts) until a 'sync' or 'synt' word is found in the received bit stream. clear : the receiver is disabled and all interrupts caused by the receiver are inhibited. bit 3 d3 rx message format set : d3 is sampled after a checksum has been received and allows the host to control the way the receiver handles the following data bits. if 'set' the receiver will assume that the next 6 bytes are data and will start error checking accordingly. clear : the receiver will stop data transfer to the host after the 2 checksum bytes until another 'sync' or 'synt' frame word is received. bit 4 d4 timer lsb bit 5 d5 timer reference table 5 bit 6 d6 timer bit 7 d7 timer msb if a new timer value is written to these inputs within 1 byte period of the last timer interrupt then the next timer period will be correct without first having to reset the timer, otherwise the timer must be reset to zero and then set to the new time. tx enable if using the internal tx preamble generation facility, e.g. with the internal timer setting the preamble length, the device may occasionally produce a tx ready interrupt immediately after a tx enable command. user software should handle this occurrence by either: a. detecting that the timer interrupt status bit is not set and that it is not appropriate to load tx data at this time. b. not using the timer. i.e. immediately after tx enable, reading the status register and loading a byte of preamble. this resets any interrupt. the length of preamble transmitted is now controlled by the number of bytes loaded.
1200/2400bps msk modem for trunked radio systems 8 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. table 4: control register d7 d6 d5 d4 reset counter and disable timer interrupts 0 0 0 0 count and interrupt every 0001 8 bits 0010" ""16 bits 0011" ""24 bits 0100" ""32 bits 0101" ""40 bits 0110" ""48 bits 0111" ""56 bits 1000" ""64 bits 1001" ""72 bits 1010" ""80 bits 1011" ""88 bits 1100" ""96 bits 1 1 0 1 " " " 104 bits 1 1 1 0 " " " 112 bits 1 1 1 1 " " " 120 bits table 5: timer control bits 4.1.5 status register (a1 = 1, a0 = 1, w r/ = 1, read only) when an interrupt is generated, the irq output goes low with the status register bits indicating the sources of the interrupt. bit description function bit 0 d0 rx data ready d0 : when set, causes an interrupt indicating that received data is ready to be read from the rx data buffer. this data must be read within 8 bit periods. set when a byte of data is loaded into the rx data buffer, if a frame (sync/synt) word has been received. bit and interrupt cleared : (i). by a read of the status register followed by a read of the rx data buffer (ii). by rx enable going low. bit 1 d1 rx checksum true d1 : when set, indicates that the error checking on the previous 6 bytes agreed with the received checksum. this function, which is valid when the rx data ready bit (d0) is set for the second byte of the received checksum, does not cause an interrupt. set : by a correct comparison between the received and generated checksums. cleared : (i). by a read of the status register followed by a read of the rx data buffer (ii). by rx enable going low. bit 2 d2 rx carrier detect d2 : is a real time indication from the modem receiver's carrier detect circuit and does not cause an interrupt. when msk tones are present at the receiver input this bit goes high, for no msk input this bit goes low. when the rx enable bit (d2C control register) is low rx carrier detect will go low. bit 3 d3 tx data ready d3: when set, causes an interrupt to indicate that a byte of data should be written to the tx data buffer within 8 bit periods. set : (i). when the contents of the tx data buffer are transferred to the tx data register (ii). when the tx enable is set (no interrupt is generated in this case. bit cleared : (i). by a read of the status register followed by a write to the tx data buffer (ii). by tx enable going low. interrupt cleared :
1200/2400bps msk modem for trunked radio systems 9 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. bit description function (i). by a read of the status register (ii). by tx enable going low. bit 4 d4 tx idle d4 : causes an interrupt when set, to indicate that all loaded data and one 'hang' bit have been transmitted. set : one bit period after the last byte is transmitted. this last byte could be either checksum or loaded data depending upon the tx parity enable state (control register d1). bit cleared : (i). by a write to the tx data buffer (ii). by tx enable going low. interrupt cleared : (i). by a read of the status register (ii). by tx enable going low. bit 5 d5 timer interrupt d4 : causes an interrupt when set, to indicate that all loaded data and one 'hang' bit have been transmitted. set : one bit period after the last byte is transmitted. this last byte could be either checksum or loaded data depending upon the tx parity enable state (control register d1). bit cleared : (i). by a write to the tx data buffer (ii). by tx enable going low interrupt cleared : (i). by a read of the status register (ii). by tx enable going low. bit 6 d6 rx sync detect * d6 : when set, causes an interrupt to indicate that a 16-bit 'sync' word (1100010011010111) has been detected in the received bit stream. set : on receipt of the 16th bit of a 'sync' word. bit and interrupt cleared : (i). by a read of the status register (ii). by rx enable going low. bit 7 d7 rx synt detect * d7 : when set, causes an interrupt to indicate that a 16-bit 'synt' word (0011101100101000 ) has been detected in the received bit stream. set : on receipt of the 16th bit of a 'synt' word. bit and interrupt cleared : (i). by a read of the status register (ii). by rx enable going low. * sync and synt detection is disabled while the checksum checker is running. table 6: status register 4.1.6 rx data buffer (a1 = 1, a0 = 0, w r/ = 1, read only) these 8 bits are the last byte of data received with bit 7 being received first. note the relative positions of the msb and lsb presented in this bit stream, the position may be different to the convention used in other processor peripherals. d0 lsb d1 d2 d3 d4 d5 d6 d7 msb 4.1.7 tx data buffer (a1 = 1, a0 = 0, w r/ = 0, write only) these 8 bits loaded to the tx data buffer are the next byte of data that will be transmitted, with bit 7 being transmitted first. note the relative positions of the msb and lsb presented in this bit stream, the position may be different to the convention used in other processor peripherals. if the tx parity enable bit (control register d1 ) is set, a 2Cbyte checksum will be inserted and transmitted by the modem after every 6 transmitted message bytes. d0 lsb d1 d2 d3 d4 d5 d6 d7 msb
1200/2400bps msk modem for trunked radio systems 10 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 4.2 syndrome word this 16-bit word (both low and high bytes) may be used to correct errors. bits s1 to s15 are the 15 bits remaining in the polynomial divider of the checksum checker at the end of 6 bytes of received message. for a correct message all 15 bits (s1 to s15) will be zero. the 2 syndrome bytes are valid when the rx data ready bit (status register d0) is set for the second byte of the received checksum and should be read, if required, before 8 byte periods. 4.2.1 syndrome low byte (a1 = 0, a0 = 0, w r/ = 1, read only) d0 s1 d1 s2 d2 s3 d3 s4 d4 s5 d5 s6 d6 s7 d7 s8 4.2.2 syndrome high byte (a1 = 0, a0 = 1, w r/ = 1, read only) d0 s9 d1 s10 d2 s11 d3 s12 d4 s13 d5 s14 d6 s15 d7 parity error d7 : this is a parity error bit. indicating an error between the received parity bit and the parity bit internally generated from the incoming message. therefore a correctly received message all 16 bits of the syndrome word (s1 to s15 and parity error) will be zero. 4.3 carrier detect time constant the value of the carrier detect capacitor, c5, determines the carrier detect time constant. a long time constant (larger value c5) results in improved noise immunity but increased response time. c5 may be varied to optimize noise immunity/response time. 1. with r2 = 1m and c5 = 1f as external components for the carrier detect function at 1200 baud only. 2. by using c5 = 0.1f and removing r2 completely the MX429A will operate at both 1200 and 2400 baud rates. 10 9 8 7 6 5 4 3 2 1 0 2 3 4 6 8 10 -5 10 -4 10 -3 10 -2 ideal coherent msk characteristic bit error rate (logarithmic scale) signal to noise ratio (db) [bit-rate bandwidth] (linear scale) MX429A characteristic 2x10 -2 11 12 13 14 15 16 figure 4: bit error rate vs. signal to noise ratio
1200/2400bps msk modem for trunked radio systems 11 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 5 application 5.1 checksum generation and checking generation C the checksum generator takes the 48 bits from the 6 bytes loaded into the tx data buffer and divides them moduloC2, by the generating polynomial;- x15 + x14 + x13 + x11 + x4 + x2 + 1 it then takes the 15-bit remainder from the polynomial divider, inverts the last bit and appends an even parity bit generated from the initial 48 bits and the 15 bit remainder (with the last bit inverted). this 16Cbit word is used as the "checksum." checking C the checksum checker does two things: it takes the first 63 bits of a received message, inverts bit 63, and divides them moduloC2, by the generating polynomial;- x15 + x14 + x13 + x11 + x4 + x2 + 1 the 15 bits remaining in the polynomial divider are checked for all zero. secondly, it generates an even parity bit from the first 63 bits of a received message and compares this bit with the received parity bit (bit 64). if the 15 bits in the polynomial divider are all zero, and the two parity bits are equal, then the rx checksum true bit (sr d1) bit is set. 5.2 receive operation rx enable where sync/synt is required after every message rx input irq output rx data ready read status register sync (synt) detect rx checksum true read rx data buffer rx message format sync sync a1 a2 a3 sync a5 a6 c1 c2 syncsynca1a2a3a4a5a6c1c2 a1 a2 a3 a4 a5 a6 c1 c2 a1 a2 a3 a4 a5 a6 c1 c2 where additional data will follow the initial address data, indicated by the state of the rx message format bit d1 d3 d4 d5 d6 c1 c2 d1 note: a - address, c - checksum, d - datacode {additional data words} sync sync a1 a2 a5 a6 c1 c2 d2 rx input irq output rx data ready read status register sync (synt) detect rx checksum true read rx data buffer rx message format a3 a4 mode 2 mode 1 a4 d1 d2 d2 d4 d5 d6 c1 c2 a1 a4 a5 a6 c1 c2 a2 a3 rx message format is sampled at this point to decide, (a) whether the message is complete or (b), more data follows figure 5: receive operation
1200/2400bps msk modem for trunked radio systems 12 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 5.3 transmit operation tx enable tx enable tx enable (a) tx - one message with checksum supplied by host (b) tx - one message with checksum generated internally (c) tx - more than one message, with checksum generated internally tx input tx input tx input tx input tx idle tx idle tx idle tx parity enable remains 'high' - indicating that all following data is to be included in the checksum tx parity enable is 'low' - indicating that the sync/synt word is not to be included in the next checksum irq output irq output irq output irq output tx data ready tx data ready tx data ready tx data ready write to tx data buffer write to tx data buffer write to tx data buffer write to tx data buffer tx parity enable tx parity enable tx parity enable tx parity enable read status register read status register read status register read status register s1 s1 s1 s1 s1 d1 s2 s2 s2 s2 d2 a1 a1 a1 a1 d3 a2 a2 a2 a2 d4 a3 a3 a3 a3 d5 a4 a4 a4 a4 d6 a5 a5 a5 a5 a6 a6 a6 a6 c1 c2 s1 s1 s2 s2 a1 a1 a2 a2 a3 a3 a4 a4 a5 a5 a6 a6 c1 c1 c2 c2 h h (1) (1) (2) (2) (2) (2) (2) (3) (3) pn pn p2 p2 p1 p1 p2 pn s1 s2 a1 a2 a3 a4 a5 a6 a6 c1 c1 c2 c2 s1 d1 s1 s2 d2 a1 d3 a2 d4 a3 d5 a4 d6 a5 c1 a6 c2 c1 h c2 p1 notes: a - address code c - checksum d - data code h - hang bit p - preamble s - sync/synt (1) - tx output at bias level (2) - tx output at high impedance (3) - if tx data ready is set here, it inhibits tx data ready interrupt - the tx idle interrupt occurs 1 bit later figure 6: transmit operation
1200/2400bps msk modem for trunked radio systems 13 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 5.4 basic power up software set up a 1 byte variable - initialise to zero (rx msg length) set up an 8 byte buffer start address - (rx buffer) set up a 1 byte variable - initialise to zero (tx msg sent) set up an 8 byte variable start address - (tx buffer) put message for transmission into buffer [tx buffer] write to control register bit0 - tx enable = '1' bit1 - tx parity enable = '0' wait 1 byte (specification requires a minimum of two bytes preamble) write to control register bit2 - rx enable = '1' bit3 - rx message format = '0' write [tx buffer{ }] to tx data buffer ? write 04 to control register - wait at least 1 bit - enable microprocessor interrupts write zeros to mx 429a control register transmit receive receive or transmit? power up return to main program figure 7: basic power-up software
1200/2400bps msk modem for trunked radio systems 14 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 5.5 basic software interrupt flow figure 8: basic software interrupt flow
1200/2400bps msk modem for trunked radio systems 15 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 5.6 bus interface timing it is very important that circuit designs conform to the bus interface timing specification as described in section 6.1.4. failure to do so can result in intermittent operation that is difficult to troubleshoot. for example, if the bus timing is incorrect, the required two step read rx data transaction (1: read status register, 2: read rx data buffer) may fail on step 2. as a result, the MX429A irq will not be reset and subsequently expected irqs will not occur. this symptom might be incorrectly interpreted as an MX429A functional failure but is, in fact, caused by the circuit designs bus interface timing violation. other examples can occur on write transactions that fail to properly clear the irq and so prevent subsequently expected irqs from occurring. circuit designs should be careful to strictly conform to the t dhw specification, the data hold time (write), as assumed requirements may be incorrect. 5.6.1 bus interface design migration from mx429 to MX429A the MX429A bus interface timing requirements precisely match those of its predecessor, the mx429. as a result, properly designed and operated mx429 bus interface circuits are compatible with the MX429A device. it should be noted that the mx429 and MX429A device may behave differently in those designs, which violate the bus timing specification . however, this is caused by the timing violation rather than an incompatibility between the two devices. 6 performance specification 6.1 electrical performance 6.1.1 absolute maximum ratings exceeding these maximum ratings can result in damage to the device. general notes min. typ. max. units supply (v dd -v ss ) -0.3 7.0 v voltage on any pin to v ss -0.3 v dd + 0.3 v current v dd -30 30 ma v ss -30 30 ma any other pin -20 20 ma j / p / lh package total allowable power dissipation at t amb = 25 c 800 mw derating above 25 c 10 mw/ c above c operating temperature -40 85 c storage temperature -55 125 c 6.1.2 operating limits correct operation of the device outside these limits is not implied. notes min. typ. max. units supply (v dd -v ss ) 4.5 5.0 5.5 v operating temperature -40 85 c xtal frequency 4.032 mhz
1200/2400bps msk modem for trunked radio systems 16 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 6.1.3 operating characteristics for the following conditions unless otherwise specified: v dd = 5.0v, t amb = 25 c, xtal/clock f 0 = 4.032mhz bit rate bandwidth = 1200hz, audio level 0db ref: = 300mv rms static values notes min. typ. max. units supply current ranges rx and tx enabled 7.0 ma rx enabled, tx disabled 4.0 6.0 ma rx disabled, tx enabled 7.0 ma rx and tx disabled 1.5 2.5 ma dynamic values modem internal delay 1.5 ms interface levels output logic '1' source current 2 120 a output logic '0' sink current 3 360 a three state output leakage current 4.0 a d0 C d7 data in/out 1 logic '1' level 3.5 v logic '0' level 1.5 v a1, a0, r/w, strobe, irq 4 logic '1' level 4.0 v logic '0' level 1.0 v analog impedance's rx input 100 k tx output (enabled) 10 k tx output (disabled) 5.0 m on-chip xtal oscillator r in 10.0 m r out 5 30.0 k oscillator gain 25.0 db xtal frequency 4.032 mhz receiver signal input levels 6 C9.0 C2.0 10.5 db bit error rate 7 @ 12db signal/noise ratio 7.0 10 C4 @ 20db signal/noise ratio 1.0 10 C8 synchronization @ 12db signal/noise ratio 8 probability of bit 16 being correct 99.5 % carrier detect response time 8 13.0 ms
1200/2400bps msk modem for trunked radio systems 17 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. static values notes min. typ. max. units transmitter output level 8.25 db output level variation 10 -1.0 1.0 db output distortion 3.0 5.0 % 3rd harmonic distortion 2.0 3.0 % logic '1' frequency 1200 baud 9 1200 hz 2400 baud 9 1200 hz logic '0' frequency 1200 baud 9 1800 hz 2400 baud 9 2400 hz isochronous distortion 1200hz C 1800hz/1200hz - 2400hz 25 40 s 1800hz C 1200hz/2400hz - 1200hz 20 40 s operating characteristics notes: 1. with each data line loaded as, c = 50pf and r = 10k . 2. v out = 4.6v. 3. v out = 0.4v 4. sink/source currents 0.1ma. 5. both xtal and xtal 4 outputs. 6. with 50db signal/noise ratio. 7. see figure 4, bit error rate. 8. this response time is measured using a 10101010101.... 01 pattern input signal at a level of 230mv rms (-2.3db) with no noise. 9. dependent upon xtal tolerance. 10. the amplitude difference between the transmit output signals (tones) representing a logic 0 a logic 1.
1200/2400bps msk modem for trunked radio systems 18 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. 6.1.4 timing timing see figure 9 min. typ. max. units (t acs ) access time 135 ns (t ah ) address hold time 0 ns (t as ) address set-up time 0 ns (t dhw ) data hold time (write) 85 ns (t ds ) data set-up time (write) 0 ns (t ohr ) output hold time (read) 15 105 ns (t st ) strobe time 140 ns strobe data out (read) data in (write) valid data valid data aaa 012 t as t ds t acs t st t ah t ohr t dhw t - access time t - address hold time t - address set-up time t - data hold time (write) t - data set-up time t - output hold time (read) t - strobe time acs ah as dhw ds ohr st figure 9: timing diagram 6.2 packaging note : all dimensions in inches (mm.) angles are in degrees package tolerances a b c e e1 f h typ. max. min. dim. j j1 p t k1 k l 0.230 (5.84) 0.583 (14.79) 0.670 (17.00) 0.200 (5.08) 1.260 (32.00) 0.165 (4.19) 0.10 (2.54) 0.115 (2.92) 0.600 (15.23) 0.594 (15.09) 0.615 (15.61) 1.100 (27.94) 0.0106 (0.269) 0.018 (0.46) 0.055 (1.39) 0.050 (1.27) 0.074 (1.88) 0.080 (2.03) 0.080 (2.03) 1.240 (31.50) 0.514 (13.06) b a pin1 h k l f j1 j p c k1 t e e1 0.02 (0.51) 0.0094 (0.239) figure 10: 24-pin cdip mechanical outline: order as part no. MX429Aj
1200/2400bps msk modem for trunked radio systems 19 MX429A ? 1998 mx-com inc. www. mxcom.com tel: 800 638-5577 336 744-5050 fax: 336 744-5054 doc. # 20480128.007 4800 bethania station road, winston-salem, nc 27105-1201 usa all trademarks and service marks are held by their respective compa nies. note : all dimensions in inches (mm.) angles are in degrees package tolerances a b c e e1 h typ. max. min. dim. j j1 p y t k l 0.220 (5.59) 0.555 (14.04) 0.670 (17.02) 7 0.160 (4.05) 1.270 (32.26) 0.151 (3.84) 0.100 (2.54) 0.121 (3.07) 0.600 (15.24) 0.590 (14.99) 0.625 (15.88) 0.015 (0.38) 0.045 (1.14) 0.008 (0.20) 0.015 (0.38) 0.015 (0.38) 0.023 (0.58) 0.040 (1.02) 0.065 (1.65) 0.066 (1.67) 0.074 (1.88) 1.200 (30.48) 0.500 (12.70) h k l j1 j1 j j p p c c b b a a pin1 pin1 t t e e e1 e1 y figure 11: 24-pin pdip mechanical outline: order as part no. MX429Ap package tolerances note : all dimensions in inches (mm.) angles are in degrees a b c d e h p f g typ. max. min. dim. k j w t y 0.435 (11.05) 0.435 (11.05) 0.051 (1.30) 0.009 (0.22) 6 30 0.409 (10.40) 0.409 (10.40) 0.146 (3.70) 0.417 (10.60) 0.417 (10.60) 0.049 (1.24) 0.006 (0.152) 0.250 (6.35) 0.250 (6.35) 0.023 (0.58) 0.047 (1.19) 0.022 (0.55) 0.018 (0.45) 0.380 (9.61) 0.380 (9.61) 0.128 (3.25) 0.048 (1.22) 45 f g p a d b e pin 1 w c j k y w h t figure 12: 24-pin plcc mechanical outline: order as part no. MX429Alh

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